MOSFET devices may be broadly categorized according to the relative altitudes of source, gate and drain terminal structures, or the orientations of the source-to-drain channels relative to the surfaces of the semiconductor substrates on which the devices are formed. In a lateral channel MOSFET, a source region and a drain region are arrayed in a lateral direction of a semiconductor substrate. The gate electrode is disposed atop the silicon substrate in between the source and drain regions. This lateral configuration of source, gate, and drain regions may be suitable for making smaller devices and for device integration. However, the lateral configuration may not be suitable for obtaining high power ratings for the devices because the voltage blocking capability of a device is proportional to the source-drain separation and because the drain-to-source current is inversely proportional to the length.
For power applications, vertical channel or trench gate MOSFETS may be preferred. In a vertical channel MOSFET, source, gate and drain regions are arrayed in a vertical direction of a semiconductor substrate. The source and drain terminals may be placed on opposite sides of a semiconductor substrate, and a gate electrode disposed in a groove or trench that is etched in the semiconductor substrate. This vertical configuration may be suitable for a power MOSFET device, as more surface space can be used as a source, and also the source and drain separation can be reduced. Reduction of the source and drain separation can increase the drain-to-source current rating and also can allow use of an epitaxial layer for the drain drift region to increase the device's voltage blocking capability.
Early known commercial trench gate MOSFET devices used V-shaped trenches. These V-shaped trenches can have drawbacks (e.g., high electric fields at the tip), which have been overcome in later developed devices using other shapes for the trenches (e.g., D-shaped (double-diffused) and U-shaped trenches). In known implementations, the gate electrode can be housed in the trenches. In a shielded gate power MOSFET (SGMOSFET), a deep trench houses an additional “shield” electrode disposed below the gate electrode. The shield gate electrode can be used to reduce the gate-drain capacitance (Cgd) (which is related to the gate-drain charge Qgd), and/or improve the breakdown voltage of the gate trench MOSFET device.
A measure of a MOSFET device's switching performance is given by the device's specific on-resistance (Rsp) or resistance per unit die area when the device is switched on. Lower Rsp values correspond to faster switching of the MOSFET device. Another measure of the switching performance of a MOSFET device is given by its characteristic gate-drain charge “Miller charge” (Qgd), which determines how much voltage or power is needed to drive or turn-on the device.
A figure of merit (FOM) of particular interest for discrete MOSFET devices combines both the Rsp and Cgd measures: FOM=Qgd*Rsp. MOSFETS with lower FOMs may be expected to have better performance than MOSFETS with higher FOMs.
Recent lateral double-diffused MOSFET (LDMOS) structures, which are a lateral channel version of D-MOSFETS, have achieved relatively low FOM values by aligning the drain region to the surface gate polysilicon electrode to minimize gate overlap of the drain region, and thereby achieve relatively low Qgd values.
Consideration is now being given to MOSFET device structures and fabrication processes. In particular, consideration is being given to MOSFET device structures or architectures with a view to lower FOM values. Additional consideration is being given to reduce cell pitch or device size for devices with relatively low FOM values.